Samsung S3F401F - Manual (Page 9)

vi S3F401F_UM_REV1.00 MICROCONTROLLER
Table of Contents
(Continued)
Chapter 8 I/O Ports
1. Overview.................................................................................................................................................. 8-1
2. S3F401F Port Configuration Overview.................................................................................................... 8-2
3. I/O Port Control Registers ....................................................................................................................... 8-3
4. Registers Description............................................................................................................................... 8-4
Chapter 9 Clock & Power Management
1. Overview.................................................................................................................................................. 9-1
2. Phase Locked Loop ................................................................................................................................. 9-4
2.1 PLL................................................................................................................................................. 9-4
2.2 PLL Value Change Steps............................................................................................................... 9-5
2.3 Capacitor for PLL Loop Filter ......................................................................................................... 9-5
3. Mode Change .......................................................................................................................................... 9-6
3.1 Changing clock speed from normal mode to highspeed mode [NORMAL Æ HIGHSPEED] ........ 9-6
3.2 Changing clock speed from highspeed mode to normal mode [HIGHSPEED Æ NORMAL] ........ 9-6
3.3 Entering the stop mode from high speed mode [HIGHSPEED Æ STOP] ..................................... 9-6
3.4 Exit From the STOP mode............................................................................................................. 9-6
3.5 Exit From the Clock fail mode ........................................................................................................ 9-6
3.6 IDLE Mode and Internal Flash ROM.............................................................................................. 9-6
4. Registers Description............................................................................................................................... 9-7