Samsung S3F401F - Manual (Page 152)

S3F401F_UM_REV1.00 I/O PORTS
8-3
3. I/O PORT CONTROL REGISTERS
PORT CONTROL REGISTERS: PCON 0, PCON 1, PCON 2
In S3F401F, most pins are multiplexed pins. Therefore, the function for each pin should be selected before that
function is executed. The value of port control register (PCONn) determines which function is used for each pin.
PORT DATA SET REGISTERS: PDATS 0, PDATS 1, PDATS 2
If these ports are configured as output ports, data can be written to the corresponding bit of PDATSn.
PORT DATA RESET REGISTERS: PDATR 0, PDATR 1, PDATR 2
If these ports are configured as output ports, data can be written to the corresponding bit of PDATRn.
PORT DATA STATUS REGISTERS: PDATSTAT 0, PDATSTAT 1, PDATSTAT 2
If Ports are configured as input/output ports, the data can be read from the corresponding bit of PDATSTATn.
PORT PULL_UP REGISTERS: PUR 0, PUR 1, PUR 2
When the corresponding bit is 0, the pull-up resistor of the pin is disabled. When 1, the pull-up resistor is enabled.
PORT OPEN_DRAIN REGISTERS: OD 0, OD 1, OD 2
When the corresponding bit is 0, the output mode of the pin is push-pull mode. When 1, the output mode is open-
drain mode.
EXTERNAL INTERRUPT CONTROL REGISTER: EXTINT 0, EXTINT 1, EXTINT 2
The 31 external interrupts are requested by various signaling methods. The EXTINT register configures the
signaling method among the low level trigger, high level trigger, falling edge trigger, rising edge trigger, and both
edge triggers for the external interrupt request.