Pll control register – Samsung S3F401F User Manual

Page 198

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CLOCK & POWER MANAGEMENT

S3F401F_UM_REV1.00

9-10

PLL Control Register

PLLCON (0x004)

Access: Read/Write

31

30 29 28 27 26 25 24

R/W-0 R/W-0

R/W-0

R/W-0

R/W-0 R/W-0 R/W-0 R/W-0

23

22 21 20 19 18 17 16

MDIV[19:16]

R/W-0 R/W-0

R/W-0

R/W-0

R/W-0 R/W-1 R/W-1 R/W-1

15 14

13

12

11

10

9

8

MDIV[15:12]

PDIV[9:8]

R/W-0 R/W-0

R/W-0

R/W-0

R/W-0 R/W-0 R/W-0 R/W-0

7

6 5 4 3 2 1 0

PDIV[7:2]

SDIV[1:0]

R/W-0 R/W-0

R/W-0

R/W-1

R/W-0 R/W-0 R/W-1 R/W-1

W: Write

R: Read

-0: 0 After reset

-1: 1 After reset

-U: Undefined after reset

Post Divider Control Field

SDIV

0x0 ~ 0x3

Pre Divider Control Field

PDIV

0x00 ~ 0xFF

Main Divider Control Field

MDIV

0x00 ~ 0xFF

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