Samsung S3F401F - Manual (Page 189)

S3F401F_UM_REV1.00 CLOCK & POWER MANAGEMENT
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CLOCK & POWER MANAGEMENT
1. OVERVIEW
In the power control logic, S3F401F has various power management schemes to keep optimal power consumption
for a given task. The power management in S3F401F consists of five modes: NORMAL mode, HIGHSPEED mode,
IDLE mode, STOP mode and CLOCK FAIL mode.
NORMAL mode is used to supply external clocks to CPU as well as all peripherals in S3F401F. In this case, the
power consumption will be increased when all peripherals are turned on.
HIGHSPEED mode is used to supply PLL output clocks to CPU as well as all peripherals in S3F401F. In this case,
the power consumption will be increased when all peripherals are turned on.
IDLE mode is invoked by the setting SYSCON.1 to ‘1’. In IDLE mode, disconnecting the clock to CPU and internal
flash ROM halts the operation while some peripherals remain active.
STOP mode, all logic including PLL will be stopped. The power consumption is only due to the leakage current in
S3F401F. The wake-up from STOP mode can be done by activating external interrupt or a system reset.
CLOCK FAIL mode is the special mode to be changed when clock monitor detects the failure of external oscillator.
If clock monitor circuit detects failure of external oscillator, clock monitor circuit makes chip reset with internal
oscillator. In the clock fail mode, the SYSCON.4 (CLKSRC) must be set to ‘0’. The external reset, watchdog timer
reset or software reset makes the chip escape from clock fail mode in working based on 1MHz internal oscillator and
enter the normal mode.