Samsung S3F401F - Manual (Page 265)

S3F401F_UM_REV1.00 UART
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UART Control Register (Continued) UARTCR (0x030) Access: Read/Write
TXE Transmit Enable Bit
0: the transmit section of the UART is disabled.
1: the transmit section of the UART is enabled.
Data transmission occurs for either UART signals, or SIR signals according to the setting of SIR
enable (bit 1). When the UART is disabled in the middle of transmission, it completes the current
character before stopping.
RXE Receive Enable Bit
0: the receive section of the UART is disabled.
1: the receive section of the UART is enabled.
Data reception occurs for either UART signals or SIR signals according to the setting of SIR
enable (bit 1). When the UART is disabled in the middle of transmission, it completes the current
character before stopping.
NOTE 1) To enable transmission, both TXE, bit 8, and UARTEN, bit 0, must be set. Similarly, to enable reception,
RXE, bit 9, and UARTEN, bit 0, must be set.
2) Program the control registers as follows:
1. Disable the UART.
2. Wait for the end of transmission or reception of the current character.
3. Flush the transmit FIFO by disabling bit 4 (FEN) in the line control register(UARTCLR_H).
4. Reprogram the control register.
5. Enable the UART.