Samsung S3F401F User Manual
Page 56
ENCODER COUNTER
S3F401F_UM_REV1.00
4-8
Encoder Counter Status Register (Continued)
ENCSTATUS (0x008) Access: Read/Write
OFPCNT
Overflow Detection of PCNT
0 = Overflow is not occurred
READ
1 = Overflow is occurred
0 = OFPCNT bit is cleared.
WRITE
1 = No effect
UFPCNT
Underflow Detection of PCNT
0 = Underflow is not occurred
READ
1 = Underflow is occurred
0 = UFPCNT bit is cleared.
WRITE
1 = No effect
OFSCNT
Overflow Detection of SCNT
0 = Overflow is not occurred
READ
1 = Overflow is occurred
0 = OFSCNT bit is cleared.
WRITE
1 = No effect
UFSCNT
Underflow Detection of SCNT
0 = Underflow is not occurred
READ
1 = Underflow is occurred
0 = UFSCNT bit is cleared.
WRITE
1 = No effect
NOTE
ENCSTATUS.4
− .7 are cleared automatically by counter clear signal. (PHASEZ, ENCCON0.1− .0)