Altera Arria V Avalon-ST - Manual (Page 111)

Bits Register Description Reset Value Access
[4:2] Reserved. 0 RO
[1] When set, the retry buffer correctable ECC error status indicates
an error.
0 RW1CS
[0] When set, the RX buffer correctable ECC error status indicates an
error.
0 RW1CS
5-16 Correctable Internal Error Status Register
2014.12.15
Altera Corporation Registers
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