A. transaction layer packet (tlp) header formats, Transaction layer packet (tlp) header formats – Altera Arria V Avalon-ST User Manual
Page 235
Transaction Layer Packet (TLP) Header Formats
A
2014.12.15
The following figures show the header format for TLPs without a data payload.
For more information about the alignment of 3- and 4-dword headers refer to the related links below for
Data Alignment and Timing for the Avalon-ST TX and RX Interfaces.
Figure A-1: Memory Read Request, 32-Bit Addressing
Memory Read Request, 32-Bit Addressing
3
+
2
+
1
+
0
+
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
7
6
5
4
3 2 1 0 7 6 5
4
3
2
1
0
Byte 0
0 0 0 0 0 0 0 0 0
TC
0 0 0 0
TD
EP
Attr
0 0
Length
Byte 4
E
B
t
s
r
i
F
E
B
t
s
a
L
g
a
T
D
I
r
e
t
s
e
u
q
e
R
Byte 8
Address[31:2]
0
0
Byte 12
Reserved
Figure A-2: Memory Read Request, Locked 32-Bit Addressing
Memory Read Request, Locked 32-Bit Addressing
3
+
2
+
1
+
0
+
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
6
5 4 3 2 1 0 7 6 5 4 3 2 1
0
Byte 0
0 0 0 0 0 0 0 1 0 TC
0 0 0 0 TD
EP
Attr
0 0 Length
Byte 4
E
B
t
s
r
i
F
E
B
t
s
a
L
g
a
T
D
I
r
e
t
s
e
u
q
e
R
Byte 8
Address[31:2]
0 0
Byte 12
Reserved
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