Altera Arria V Avalon-ST - Manual (Page 55)

Data Alignment and Timing for the 64‑Bit Avalon‑ST TX Interface
Figure 4-14:
The following figure illustrates the mapping between Avalon-ST TX packets and PCI Express TLPs for
three dword header TLPs with non-qword aligned addresses on a 64-bit bus.
Figure 4-15: 64-Bit Avalon-ST tx_st_data Cycle Definition for 3-Dword Header TLP with Non-Qword
Aligned Address
pld_clk
tx_st_data[63:32]
tx_st_data[31:0]
tx_st_sop
tx_st_eop
Header1 Data0 Data2
Header0 Header2 Data1
This figure illustrates the storage of non-qword aligned data.) Non-qword aligned address occur when
address[2]
is set. When address[2] is set,
tx_st_data[63:32]
contains
Data0
and
tx_st_data[31:0]
contains dword
header2
. In this figure, the headers are formed by the following bytes:
H0 ={pcie_hdr_byte0, pcie_hdr _byte1, pcie_hdr _byte2, pcie_hdr _byte3}
H1 = {pcie_hdr_byte4, pcie_hdr _byte5, header pcie_hdr byte6, pcie_hdr _byte7}
H2 = {pcie_hdr _byte8, pcie_hdr _byte9, pcie_hdr _byte10, pcie_hdr _byte11}
Data0 = {pcie_data_byte3, pcie_data_byte2, pcie_data_byte1, pcie_data_byte0}
Data1 = {pcie_data_byte7, pcie_data_byte6, pcie_data_byte5, pcie_data_byte4}
Data2 = {pcie_data_byte11, pcie_data_byte10, pcie_data_byte9, pcie_data_byte8}
The following figure illustrates the mapping between Avalon-ST TX packets and PCI Express TLPs for a
four dword header with qword aligned addresses on a 64-bit bus
Figure 4-16: 64-Bit Avalon-ST tx_st_data Cycle Definition for 4-Dword TLP with Qword Aligned
Address
pld_clk
tx_st_data[63:32]
tx_st_data[31:0]
tx_st_sop
tx_st_eop
Header1 Header3 Data1
Header0 Header2 Data0
In this figure, the headers are formed by the following bytes.
H0 = {pcie_hdr_byte0, pcie_hdr _byte1, pcie_hdr _byte2, pcie_hdr _byte3}
H1 = {pcie_hdr _byte4, pcie_hdr _byte5, pcie_hdr byte6, pcie_hdr _byte7}
H2 = {pcie_hdr _byte8, pcie_hdr _byte9, pcie_hdr _byte10, pcie_hdr _byte11}
H3 = pcie_hdr _byte12, pcie_hdr _byte13, header_byte14, pcie_hdr _byte15}, 4 dword
header only
4-18 Data Alignment and Timing for the 64‑Bit Avalon‑ST TX Interface
2014.12.15
Altera Corporation Interfaces and Signal Descriptions
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