Altera Arria V Avalon-ST - Manual (Page 33)

Port Function Parameters Defined Separately for All Port Functions
Base Address Register (BAR) and Expansion ROM Settings
The type and size of BARs available depend on port type.
Table 3-8: BAR Registers
Parameter Value Description
Type Disabled
64-bit prefetchable memory
32-bit non-prefetchable memory
32-bit prefetchable memory
I/O address space If you select 64-bit prefetchable memory, 2
contiguous BARs are combined to form a 64-bit
prefetchable BAR; you must set the higher numbered
BAR to Disabled. A non-prefetchable 64-bit BAR is
not supported because in a typical system, the Root
Port Type 1 Configuration Space sets the maximum
non-prefetchable memory window to 32 bits. The
BARs can also be configured as separate 32-bit
memories.
Defining memory as prefetchable allows contiguous
data to be fetched ahead. Prefetching memory is
advantageous when the requestor may require more
data from the same region than was originally
requested. If you specify that a memory is prefetch‐
able, it must have the following 2 attributes:
• Reads do not have side effects such as changing
the value of the data read
• Write merging is allowed
The 32-bit prefetchable memory and I/O address
space BARs are only available for the Legacy
Endpoint.
Size 16 Bytes–8 EBytes Supports the following memory sizes:
• 128 bytes–2 GBytes or 8 EBytes: Endpoint and
Root Port variants
• 6 bytes–4 KBytes: Legacy Endpoint variants
Expansion
ROM
Disabled–16 MBytes Specifies the size of the optional ROM.
The expansion ROM is only available for the
Avalon-ST interface.
3-10 Port Function Parameters Defined Separately for All Port Functions
2014.12.15
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