Altera Quartus II Scripting - Manual (Page 149)

Chapter 3: Tcl Packages & Commands 3–19
advanced_timing
© July 2013 Altera Corporation Quartus II Scripting Reference Manual
get_timing_edge_delay
Usage
get_timing_edge_delay [-cell] [-fall] [-ic] [-max] [-min] [-rise] [-total] <edge>
Options
-cell: Get the Cell Delay component
-fall: Get Fall Delay
-ic: Get the Interconnect Delay component
-max: DEFAULT - Get Max Delay
-min: Get Min Delay
-rise: Get Rise Delay
-total: DEFAULT - Get the Total (IC + Cell) Delay
<edge>: Edge
Description
Returns the requested delay for the specified timing edge.
Each edge stores two delay components, the interconnect and the cell delays. The interconnect delay
represents the routing delay to the atom itself, while the cell delay represents the point to point delay in
the atom. (Note that timing nodes always represent the output port of the atom). Use -ic, -cell, or -total to
get the interconnect, cell, or sum of both delays
If neither -rise nor -fall is specified, then an undefined delay edge is assumed and the worst case or best
case delay is returned based on the -max or -min options. If the family does not have Rise/Fall delays, then
-max and -min will return the same value. (Note that this may change in the future when the Quartus II
software models On Chip Variation)
■ -min and -max are mutually exclusive
■ -rise and -fall are mutually exclusive
■ -ic, -cell and -total are mutually exclusive
Example
# Count the number of clock edges in the design
load_package advanced_timing
project_open <design>
create_timing_netlist
foreach_in_collection edge [get_timing_edges] {
set max_delay [get_timing_edge_delay -max $edge]
set rise_max_delay [get_timing_edge_delay -max -rise $edge]
set fall_max_delay [get_timing_edge_delay -max -fall $edge]
puts "Worst Case Max = $max_delay, Rise Max = $rise_max_delay, Fall \
Max = $fall_max_delay"
}
foreach_in_collection edge [get_timing_edges] {
set max_delay [get_timing_edge_delay -max -total -rise $edge]
set ic_max_delay [get_timing_edge_delay -max -ic -rise $edge]
set cell_max_delay [get_timing_edge_delay -max -cell -rise $edge]
puts "RISE: $max_delay = $ic_max_delay + $cell_max_delay"
}
project_close