Generate_vhdl_simgen_model, Usage, Options – Altera Quartus II Scripting User Manual
Page 271: Description, Example, Generate_vhdl_simgen_model –141
Chapter 3: Tcl Packages & Commands
3–141
iptclgen
© July 2013
Altera Corporation
Quartus II Scripting Reference Manual
generate_vhdl_simgen_model
Usage
generate_vhdl_simgen_model -family <family> -files <files> -result_dir <result_dir>
-temp_dir <temp_dir> -top_level_name <top_level_name>
Options
-family <family>: family name
-files <files>: comma seperated list of files
-result_dir <result_dir>: result directory for .vho file. Must already exist
-temp_dir <temp_dir>: temp_dir
-top_level_name <top_level_name>: top level entity name
Description
Creates a temporary project in the temporary directory, creates the simgen model and copies to the
result_dir.
Example
generate_vhdl_simgen_model -family "stratix iii" -files \
"mycore.v,subcore.v" -top_level_name "mycore.v" -temp_dir "c:/temp" \
-result_dir "c:/outdir"