Altera Quartus II Scripting - Manual (Page 495)

Chapter 3: Tcl Packages & Commands 3–365
simulator
© July 2013 Altera Corporation Quartus II Scripting Reference Manual
initialize_simulation
Usage
initialize_simulation [-cell_delay_model_type <transport | inertial>] [-check_outputs
<On | Off>] [-end_time <end_time>] [-ignore_vector_file <On | Off>]
[-interconnect_delay_model_type <transport | inertial>] [-memory_limiter <On | Off>]
[-perform_glitch_filtering <auto | always | never>] [-power_vcd_output <target_file>]
[-pvt_multicorner <On | Off>] [-pvt_temperature <pvt_temperature>]
[-pvt_timing_model_type <slow | fast>] [-pvt_voltage <pvt_voltage>]
[-read_settings_files <On | Off>] [-saf_output <target_file>] [-sim_mode <functional |
timing | timing_using_fast_timing_model >] [-simulation_results_format <VWF | CVWF |
VCD>] [-vector_source <vector_source_file>] [-write_settings_files <On | Off>]
Options
-cell_delay_model_type <transport | inertial>: Option to specify the type of cell delay
model to be used - transport or inertial
-check_outputs <On | Off>: Option to direct the Simulator to check expected outputs
against actual outputs in the Simulation Report
-end_time <end_time>: Option to set simulation end time when source vector file is
ignored
-ignore_vector_file <On | Off>: Option to ignore source vector file
-interconnect_delay_model_type <transport | inertial>: Option to specify the type of
interconnect delay model to be used - transport or inertial
-memory_limiter <On | Off>: Option to direct the Simulator to flush signal transitions
from memory to disk for memory optimization
-perform_glitch_filtering <auto | always | never>: Option to specify that the simulator
perform glitch filtering when running timing simulation.
-power_vcd_output <target_file>: Option to specify generation of the VCD File for
PowerPlay Power Analyzer as well as the name of the generated VCD File
-pvt_multicorner <On | Off>: Option to use multicorner PVT timing model
-pvt_temperature <pvt_temperature>: Option to set the PVT temperature to be used (value
in C)
-pvt_timing_model_type <slow | fast>: Option to specify the PVT timing model to be used
-pvt_voltage <pvt_voltage>: Option to set the PVT voltage to be used (value in mV)
-read_settings_files <On | Off>: Option to read the assignments from the Quartus II
Settings File (.qsf) and override assignments obtained from the database
-saf_output <target_file>: Option to specify generation of the Signal Activity File as
well as the name of the generated Signal Activity File
-sim_mode <functional | timing | timing_using_fast_timing_model >: Option to specify
the type of simulation to perform
-simulation_results_format <VWF | CVWF | VCD>: Option to specify the type of file format
for the output vector file
-vector_source <vector_source_file>: Option to specify the source of input vectors to
be used for simulation. The specified value must be an existing file with a .vwf, .vec,
or .tbl extension
-write_settings_files <On | Off>: Option to write out the settings obtained from
command-line options to the Quartus II Settings File (.qsf).
Description
Initializes the simulation for the current design. During initialization, the Simulator builds the simulation
netlist and sets the simulation time to zero.