Altera Quartus II Scripting - Manual (Page 23)

Introduction to the Quartus II Scripting Reference Manual 1–5
Overview
© July 2013 Altera Corporation Quartus II Scripting Reference Manual
Tcl Commands
The Quartus II software Tcl commands are grouped into Tcl packages and loaded on
demand. This reduces the run-time memory of executable files and makes memory
available to application.
Table 2 describes each Tcl package.
Table 2. Tcl Packages
Package Name Package Description
advanced_timing Traverse the timing netlist and get information about timing nodes
backannotate Back annotate assignments
chip_editor Identify and modify resource usage and routing with the Chip Editor
database_manager Manage version-compatible database files
device Get device and family information from the device database
flow Compile a project, run command-line executables and other common flows
insystem_memory_edit Read and edit memory contents in Altera devices
jtag Control the jtag chain
logic_analyzer_interface Query and modify the logic analyzer interface output pin state
logiclock Create and manage LogicLock regions
misc Perform miscellaneous tasks
project
Create and manage projects and revisions, make any project assignments including timing
assignments
report Get information from report tables, create custom reports
sdc Specifies constraints and exceptions to the TimeQuest Analyzer
sdc_ext Altera-specific SDC commands
simulator Configure and perform simulations
sta
Contains the set of Tcl functions for obtaining advanced information from the TimeQuest
Timing Analyzer
stp Run the SignalTap
®
II logic analyzer
timing Annotate timing netlist with delay information, compute and report timing paths
timing_assignment
Contains the set of Tcl functions for making project-wide timing assignments, including clock
assignments; all Tcl commands designed to process Classic Timing Analyzer assignments
have been moved to this package
timing_report List timing paths