Altera Quartus II Scripting - Manual (Page 199)

Chapter 3: Tcl Packages & Commands 3–69
chip_planner
© July 2013 Altera Corporation Quartus II Scripting Reference Manual
make_sp
Usage
make_sp [-clk <clock signal name>] [-io_std <io standard>] -loc <location> -pin_name
<pin name> [-regs <num>] [-reset <reset signal name>] -src_name <source name>
Options
-clk <clock signal name>: Clock signal for the register in the SignalProbe pipeline
-io_std <io standard>: I/O standard of the SignalProbe pin
-loc <location>: Pin location of the SignalProbe pin
-pin_name <pin name>: SignalProbe pin name
-regs <num>: Number of pipeline stages for the SignalProbe pin
-reset <reset signal name>: Reset signal for the register in the SignalProbe pipeline
-src_name <source name>: Name of the signal to probe
Description
Creates a SignalProbe pin connected to the source signal using the specified number of registers. Columns
are: Pin_name, pin_lcation, io_standard, oterm_name, number of registers, clock name, reset_name, is
enabled, and has ECO changes.
Example
make_sp