Do_report_timing, Force_dat, Model=<fast|slow – Altera Quartus II Scripting User Manual

Page 106: Multicorner[=on|off, Post_map, Qsf2sdc, Do_report_timing –80 --force_dat –80

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2–80

Chapter 2: Command-line Executables

quartus_sta

Quartus II Scripting Reference Manual

© July 2013

Altera Corporation

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Tcl ........................................................................................................................................................... 2–103
arguments ............................................................................................................................................... 2–93
makefiles.................................................................................................................................................. 2–93
return_codes ........................................................................................................................................... 2–95

--do_report_timing

For every clock domain, this option reports the most critical path based on setup slack. This command is
equivalent to:

report_timing -npaths 1 -to_clock $clock

for every clock in the design (in which $clock is the clock name).

--force_dat

Force Delay Annotation. Using this option runs the Delay Annotator and new delays are annotated on the
compiler netlist. The compiler netlist is the source from which a timing netlist is created. This option
therefore ensures that new delays are used in the timing netlist. If this option is not set, the default flow
attempts to re-use existing delays in the compiler netlist (if available).

--model=<fast|slow>

Option to specify the timing model to use when running the TimeQuest timing analyzer.

Examples:

quartus_map top --family=Stratix
quartus_fit top --part=EP1S10F780C7
# Run Timing Analysis for every speed grade
quartus_sta top --model slow --temperature 0 -voltage 1200

--multicorner[=on|off]

Creates slack summaries for all available operating conditions, enabling multi-corner timing analysis.

--post_map

Analyzes output of Analysis and Synthesis (quartus_map), using a rough delay model to estimate the
place and route results. Note that the error can be vary large.

--qsf2sdc

Use this option to migrate assignments from the Classic timing analyzer to SDC format. The migration
includes existing QSF timing assignments, and the results found in the timing analysis report. The
recommended migration flow is shown below:

quartus_map rev
quartus_fit rev
quartus_tan rev
quartus_sta rev --qsf2sdc

Warnings are given for any assignment that does not have a save conversion into an SDC command. The
genrated SDC file is named <revision>.sdc, where revision is the current revision of your project.

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