Altera Quartus II Scripting - Manual (Page 418)

3–288 Chapter 3: Tcl Packages & Commands
sdc
Quartus II Scripting Reference Manual © July 2013 Altera Corporation
create_generated_clock
Usage
create_generated_clock [-add] [-divide_by <factor>] [-duty_cycle <percent>]
[-edge_shift <shift_list>] [-edges <edge_list>] [-invert] [-master_clock <clock>]
[-multiply_by <factor>] [-name <clock_name>] [-offset <time>] [-phase <degrees>]
-source <clock_source> <targets>
Options
-add: Add clock to existing clock node
-divide_by <factor>: Division factor
-duty_cycle <percent>: Specifies the duty cycle as a percentage of the clock
period--accepts floating point values
-edge_shift <shift_list>: List of edge shifts
-edges <edge_list>: List of edge values
-invert: Invert the clock waveform
-master_clock <clock>: Specifies clock of the source node
-multiply_by <factor>: Multiplication factor
-name <clock_name>: Name of generated clock
-offset <time>: Specifies the offset as an absolute time shift
-phase <degrees>: Specifies the phase shift in degrees
-source <clock_source>: Source node for the generated clock
<targets>: List or collection of targets
Description
Defines an internally generated clock. If -name is not specified, the clock name is the same as the first
target in the list or collection. The clock name is used to refer to the clock in other commands.
If a clock with the same name is already assigned to a given target, the create_generated_clock command
will overwrite the existing clock. If a clock with a different name exists on the given target, the
create_generated_clockcommand will be ignored unless the -add option is used. The -add option can be
used to assign multiple clocks to a pin or port, and is recommended be used with -master_clock option.
The source of the generated clock, specified by -source, is a port, pin, register, or net in the design. All
waveform modifications are relative to this point. If more than one clock feeds the source node, the
-master_clock option must be used to specify which clock to modify.
The source latency of the generated clock is based on the clock network of the generated clock, and not the
clock network of the node specified using -source. This latency is added to any source latency of the
master clock.
The -divide_by, -multiply_by, -invert, -duty_cycle, -edges, and -edge_shift options modify the waveform
relative to the waveform at the source node.
Clock division and multiplication, using -divide_by and -multiply_by, is performed relative to the first
rising edge. Clock division is based on edges in the master clock waveform, and scaled if the division is an
odd number. Use the -duty_cycle option to specify the new duty cycle for clock multiplication. Use the
-phase option to specify any phase shift relative to the new clock period. Use the -offset option to specify
an arbitrary offset or time shift. Use the -invert option to invert the waveform.