This sheet continues on facing page – Motorola MVME172 User Manual
Page 102
2-24
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VMEchip2
2
Table 2-1. VMEchip2 Memory Map - LCSR Summary (Sheet 2 of 2)
EN
IRQ
31
EN
IRQ
30
EN
IRQ
29
EN
IRQ
28
EN
IRQ
27
EN
IRQ
26
EN
IRQ
25
EN
IRQ
24
EN
IRQ
23
EN
IRQ
22
EN
IRQ
21
EN
IRQ
20
EN
IRQ
19
EN
IRQ
18
EN
IRQ
17
EN
IRQ
16
CLR
IRQ
31
CLR
IRQ
30
CLR
IRQ
29
CLR
IRQ
28
CLR
IRQ
27
CLR
IRQ
26
CLR
IRQ
25
CLR
IRQ
24
CLR
IRQ
23
CLR
IRQ
22
CLR
IRQ
21
CLR
IRQ
20
CLR
IRQ
19
CLR
IRQ
18
CLR
IRQ
17
CLR
IRQ
16
AC FAIL
IRQ LEVEL
VMEchip2 LCSR Base Address = $FFF40000
OFFSET:
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
68
6C
70
74
78
7C
80
84
88
8C
AC
FAIL
IRQ
AB
IRQ
SYS
FAIL
IRQ
MWP
BERR
IRQ
PE
IRQ
IRQ1E
IRQ
TIC2
IRQ
TIC1
IRQ
VME
IACK
IRQ
DMA
IRQ
SIG3
IRQ
SIG2
IRQ
SIG1
IRQ
SIG0
IRQ
LM1
IRQ
LM0
IRQ
ABORT
IRQ LEVEL
SYS FAIL
IRQ LEVEL
MST WP ERROR
IRQ LEVEL
VME IACK
IRQ LEVEL
DMA
IRQ LEVEL
SIG 3
IRQ LEVEL
SIG 2
IRQ LEVEL
SW7
IRQ LEVEL
SW6
IRQ LEVEL
SW5
IRQ LEVEL
SW4
IRQ LEVEL
SPARE
IRQ LEVEL
VME IRQ 7
IRQ LEVEL
VME IRQ 6
IRQ LEVEL
VME IRQ 5
IRQ LEVEL
VECTOR BASE
REGISTER 0
VECTOR BASE
REGISTER 1
MST
IRQ
EN
SYS
FAIL
LEVEL
AC
FAIL
LEVEL
ABORT
LEVEL
GPIOEN
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
ARB
BGTO
EN
DMA
TIME OFF
DMA
TIME ON
VME
GLOBAL
TIMER
SYS
FAIL
SCON
BRD
FAIL
STAT
PURS
STAT
CLR
PURS
STAT
BRD
FAIL
OUT
RST
SW
EN
SYS
RST
WD
CLR
TO
WD
CLR
CNT
WD
TO
STAT
TO
BF
EN
WD
SRST
LRST
WD
RST
EN
WD
EN
PRE
4C
50
54
58
5C
60
64
TICK TIMER 1
TICK TIMER 1
TICK TIMER 2
TICK TIMER 2
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