Motorola MVME172 - Manual (Page 14)

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IP to Local Bus Data Routing.................................................................................. 4-52
Memory Space Accesses .................................................................................. 4-52
I/O and ID Space Accesses .............................................................................. 4-54
CHAPTER 5 MCECC
Introduction ............................................................................................................... 5-1
Features...................................................................................................................... 5-1
Functional Description .............................................................................................. 5-2
General Description............................................................................................ 5-2
Performance........................................................................................................ 5-2
Cache Coherency................................................................................................ 5-3
ECC .................................................................................................................... 5-4
Cycle Types................................................................................................. 5-4
Error Reporting ........................................................................................... 5-5
Single Bit Error (Cycle Type = Burst Read or Non-Burst Read) ............... 5-5
Double Bit Error (Cycle Type = Burst Read or Non-Burst Read) .............. 5-5
Triple (or Greater) Bit Error
(Cycle Type = Burst Read or Non-Burst Read) .................................. 5-6
Cycle Type = Burst Write ........................................................................... 5-6
Single Bit Error (Cycle Type = Non-Burst Write)...................................... 5-6
Double Bit Error (Cycle Type = Non-Burst Write) .................................... 5-6
Triple (or Greater) Bit Error (Cycle Type = Non-Burst Write) .................. 5-6
Single Bit Error (Cycle Type = Scrub) ....................................................... 5-6
Double Bit Error (Cycle Type = Scrub) ...................................................... 5-7
Triple (or Greater) Bit Error (Cycle Type = Scrub) .................................... 5-7
Error Logging ..................................................................................................... 5-7
Scrub................................................................................................................... 5-7
Refresh................................................................................................................ 5-8
Arbitration .......................................................................................................... 5-8
Chip Defaults...................................................................................................... 5-8
Programming Model.................................................................................................. 5-9
Chip ID Register............................................................................................... 5-14
Chip Revision Register..................................................................................... 5-14
Memory Configuration Register ...................................................................... 5-15
Dummy Register 0............................................................................................ 5-16
Dummy Register 1............................................................................................ 5-17
Base Address Register...................................................................................... 5-17
DRAM Control Register .................................................................................. 5-18
BCLK Frequency Register ............................................................................... 5-20
Data Control Register ....................................................................................... 5-21