Motorola MVME172 - Manual (Page 111)

LCSR Programming Model
http://www.mcg.mot.com/literature 2-33
2
VMEbus Slave Address Modifier Select Register 2
This register is the address modifier select register for the second VMEbus
to local bus map decoder. There are three groups of address modifier select
bits: DAT, PGM, BLK and D64; A24 and A32; and USR and SUP. At least
one bit must be set from each group to enable the map decoder.
DAT When this bit is high, the second map decoder responds to
VMEbus data access cycles. When this bit is low, the
second map decoder does not respond to VMEbus data
access cycles.
PGM When this bit is high, the second map decoder responds to
VMEbus program access cycles. When this bit is low, the
second map decoder does not respond to VMEbus
program access cycles.
BLK When this bit is high, the second map decoder responds to
VMEbus block access cycles. When this bit is low, the
second map decoder does not respond to VMEbus block
access cycles.
D64 When this bit is high, the second map decoder responds to
VMEbus D64 block access cycles. When this bit is low,
the second map decoder does not respond to VMEbus
D64 block access cycles.
A24 When this bit is high, the second map decoder responds to
VMEbus A24 (standard) access cycles. When this bit is
low, the second map decoder does not respond to
VMEbus A24 access cycles.
ADR/SIZ $FFF40010 (8 bits of 32)
BIT 23 22 21 20 19 18 17 16
NAME SUP USR A32 A24 D64 BLK PGM DAT
OPER R/W R/W R/W R/W R/W R/W R/W R/W
RESET 0 PSL 0 PSL 0 PSL 0 PSL 0 PSL 0 PSL 0 PSL 0 PSL