Motorola MVME172 - Manual (Page 216)

3-28 Computer Group Literature Center Web Site
MC2 Chip
3
SZ1 - SZ0 are initialized at reset to a value which is
determined by the contents of a factory-programmed
resident device
F0 F0 set to a 0 indicates that one 28F016SA 2M x 8 Flash
memory device is used. F0 set to a 1 indicates that four
28F020 256K x 8 Flash memory devices are used.
Table 3-5. DRAM Size Control Bit Encoding
DZ2 - DZ0 DRAM Configuration
$0 Not defined for MVME172
$1 Not defined for MVME172
$2 Not defined for MVME172
$3 Not defined for MVME172
$4 4 MByte (non-interleaved)
$5 8 MByte (non-interleaved)
$6 DRAM is not present
$7 16 MByte (interleaved)
Table 3-6. SRAM Size Control Bit Encoding
SZ1 - SZ0 SRAM Configuration
$0 128 KB
$1 512 KB
$2 1 MB
$3 2 MB