Ip2 chip, Introduction, Summary of major features – Motorola MVME172 User Manual
Page 237: Chapter 4, Introduction -1, Summary of major features -1, 4ip2 chip
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IP2 Chip
Introduction
This chapter describes the IndustryPack Interface Controller (IP2 chip)
ASIC for the MC68060 bus. The IP2 chip interfaces to up to four
IndustryPacks (IPs) to the MC68060.
Summary of Major Features
❏
Provides all logic required to interface MC68060 bus to four
IndustryPacks.
❏
Supports IndustryPack I/O, Memory, Interrupt Acknowledge, and
ID cycles.
❏
Supports 8-bit, 16-bit, and 32-bit (double size) IndustryPack cycles.
❏
Supports four DMA channels, one per IndustryPack interface, or
two channels on IP_a and IP_c.
❏
Supports a programmable clock for strobe generation to the
IndustryPack interface.
❏
Provides dynamic bus sizing for accesses to IndustryPack Memory
Space.
❏
Fixed base address for IndustryPack I/O, ID, spaces.
❏
Programmable base address/size for IndustryPack Memory Space.
❏
Thirteen Interrupt Handler Control Registers, two for each
IndustryPack, one per DMA controller (DMAC) and programmable
clock.
❏
Recovery timer for each IndustryPack to provide dead time between
back to back accesses.