Motorola MVME172 - Manual (Page 95)

Functional Blocks
http://www.mcg.mot.com/literature 2-17
2
VMEbus System Controller
With the exception of the optional SERCLK Driver and the Power
Monitor, the chip includes all the functions that a VMEbus System
Controller must provide. The System Controller is enabled/disabled with
the aid of an external jumper (the only jumper required in a VMEchip2
based VMEbus interface).
Arbiter
The arbitration algorithm used by the chip arbiter is selected by software.
All three arbitration modes defined in the VMEbus Specification are
supported: Priority (PRI), Round-Robin-Select (RRS), as well as Single
(SGL). When operating in the PRI mode, the arbiter asserts the BCLR line
whenever it detects a request for the bus whose level is higher that the one
being serviced.
The chip includes an arbitration timer, preventing a bus lockup when no
requester assumes control of the bus after the arbiter has issued a grant.
Using a control bit, this timer can be enabled or disabled. When enabled,
it assumes control of the bus by driving the BBSY signal after 256
µ
secs,
releasing it after satisfying the requirements of the VMEbus specification,
and then re-arbitrating any pending bus requests.
IACK Daisy-Chain Driver
Complying with the latest revision of the VMEbus specification, the
System Controller includes an IACK Daisy-Chain Driver, ensuring that
the timing requirements of the IACK daisy-chain are satisfied.
Bus Timer
The Bus Timer is enabled/disabled by software to terminate a VMEbus
cycle by asserting BERR if any of the VMEbus data strobes is maintained
in its asserted state for longer than the programmed time-out period. The
time-out period can be set to 8, 64, or 256 secs. The bus timer terminates
an unresponded VMEbus cycle only if both it and the system controller are
enabled.