Motorola MVME172 - Manual (Page 302)

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MCECC
5
Table 5-3. MCECC Internal Register Memory Map, Part 2
MCECC Base Address = $FFF43000 (1st); $FFF43100 (2nd)
Register
Offset
Register
Name
Register Bit Names
D31 D30 D29 D28 D27 D26 D25 D24
$20 DATA
CONTROL 0 0 DERC ZFILL RWCKB 0 0 0
$24 SCRUB
CONTROL RACODE RADATA HITDIS SCRB SCRBEN 0 SBEIEN IDIS
$28 SCRUB
PERIOD SBPD15 SBPD14 SBPD13 SBPD1
2
SBPD11 SBPD10 SBPD9 SBPD8
$2C SCRUB
PERIOD SBPD7 SBPD6 SBPD5 SBPD4 SBPD3 SBPD2 SBPD1 SBPD07
$30 CHIP
PRESCALE CPS7 CPS6 CPS5 CPS4 CPS3 CPS2 CPS1 CPS0
$34 SCRUB
TIME
ON/OFF SRDIS 0 STON2 STON1 STON0 STOFF2 STOFF1 SRDIS
$38 SCRUB
PRESCALE 0 0 SPS21 SPS20 SPS19 SPS18 SPS17 SPS16
$3C SCRUB
PRESCALE SPS15 SPS14 SPS13 SPS12 SPS11 SPS10 SPS9 SPS85
$40 SCRUB
PRESCALE SPS7 SPS6 SPS5 SPS4 SPS3 SPS2 SPS1 SPS0
$44 SCRUB
TIMER ST15 ST14 ST13 ST12 ST11 ST10 ST9 ST8
$48 SCRUB
TIMER ST7 ST6 ST5 ST4 ST3 ST2 ST1 ST0
$4C SCRUB
ADDR
CNTR 0 0 0 0 0 SAC26 SAC25 SAC24
$50 SCRUB
ADDR
CNTR SAC23 SAC22 SAC21 SAC20 SAC19 SAC18 SAC17 SAC16