Motorola MVME172 - Manual (Page 77)

Software Support Considerations
http://www.mcg.mot.com/literature 1-59
1
The MVME172 makes the following assumptions and supports a limited
subset of RMW instructions. The MVME172 supports single-address
RMW cycles caused by TAS and CAS instructions. Because it is not
possible to tell if the MC68060 is executing a single- or multiple-address
read-modify-write cycle, software should only execute single-address
RMW instructions. Multiple-address RMW cycles caused by CAS or
CAS2 instructions are not guaranteed indivisible and may cause illegal
VMEbus cycles. Lock cycles caused by MMU table walks do not cause
illegal VMEbus cycles, and they are not guaranteed indivisible.
Illegal Access to IP Modules from External VMEbus Masters
When a device other than the local MVME172 is operating as VMEbus
master, access by that device to the local IP modules is subject to
restrictions.
Access to the IndustryPack memory space is supported in all cases. As a
result of the difference in data width between the VMEbus and the IP
modules (D32 versus D16), however, access to the IndustryPack I/O, ID,
and Interrupt Acknowledge space is not supported for single IP modules.
This applies to IndustryPacks a, b, c, and d.