Motorola MVME172 - Manual (Page 196)

3-8 Computer Group Literature Center Web Site
MC2 Chip
3
Watchdog Timer
A watchdog timer function is provided in the VMEchip2 and the MC2
chip. The watchdog timer implemented in the MC2 chip is used when the
"No VMEbus Interface" option is enabled. When the watchdog timer is
enabled, it must be reset by software within the programmed time or it
times out. The watchdog timer can be programmed to generate a board
level reset signal or board fail signal if it times out. Note that, unlike the
VMEchip2, the MC2 chip timer cannot generate a system reset because it
is not connected to the VMEbus.
Local Bus Timer
The MVME172 provides a time-out function for the local bus. When the
timer is enabled and a local bus access times out, a Transfer Error
Acknowledge (TEA) signal is sent to the local bus master. The time-out
value is selectable by software for 8
µ
sec, 64
µ
sec, 256
µ
sec, or infinite.
The local bus timer does not operate during VMEbus bound cycles.
VMEbus bound cycles are timed by the VMEbus access timer and the
VMEbus global timer. Refer to the section on Example of the Proper Use
of Bus Timers in Chapter 1 for more information.
The access timer logic is duplicated in the VMEchip2 and MC2 chip
ASIC. Because the local bus timer in the VMEchip2 can detect an offboard
access and the MC2 chip local bus timer cannot, the timer in the
VMEchip2 is used in all cases except when the "No VMEbus Interface"
option is enabled.
Memory Map of the MC2 Chip Registers
The register map and address of the memory controller ASIC (MC2 chip)
is documented in the following table. If the register is depicted as a 32-bit
entity, it must be accessed as a longword. If it is accessed as a byte or word,
the cycle is terminated with an error. If the register is depicted as a 8- or
16-bit entity, it can be accessed as a byte, word, or longword.