Motorola MVME172 - Manual (Page 30)

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Board Description and Memory Maps
1
Notes 1. Reset enables the decoder for this space of the memory
map so that it will decode address spaces
$FF800000-$FF9FFFFF and $00000000-$003FFFFF. The
decode at 0 must be disabled in the MC2 chip before DRAM
is enabled. DRAM is enabled with the DRAM Control
Table 1-4. 400/500-Series MVME172 Local Bus Memory Map
Address Range
Devices
Accessed
Port
Width
Size
Software
Cache
Inhibit
Note(s)
Programmable DRAM on board D32 4MB-16 MB N 2
Programmable SRAM D32 128KB-2MB N 2
Programmable VMEbus
A32/A24 D32/D16 -- ? 4
Programmable IP_a Memory D32-D8 64KB-8MB ? 2, 4
Programmable IP_b Memory D32-D8 64KB-8MB ? 2, 4
Programmable IP_c Memory D32-D8 64KB-8MB ? 2, 4
Programmable IP_d Memory D32-D8 64KB-8MB ? 2, 4
$FF800000 - $FF9FFFFF Flash/PROM D32 2MB N 1, 5
$FFA00000 - $FFBFFFFF PROM/Flash D32 2MB N 6
$FFC00000 - $FFCFFFFF Not decoded -- 1MB N 7
$FFD00000 - $FFDFFFFF Not decoded -- 1MB N 7
$FFE00000 - $FFE7FFFF SRAM default D32 512KB N --
$FFE80000 - $FFEFFFFF Not decoded -- 512KB N 7
$FFF00000 - $FFFEFFFF Local I/O D32-D8 878KB Y 3
$FFFF0000 - $FFFFFFFF VMEbus A16 D32/D16 64KB ? 2, 4