Sram space size register, Sram space size register -29, Table 3-7. sram size control bit encoding -29 – Motorola MVME172 User Manual
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3-29
3
SRAM Space Size Register
SEN
SRAM ENABLE must be set to a one before the SRAM
can be accessed.
SZ1-SZ0
The size bits configure the SRAM decoder for a particular
memory size. The following table defines their use. Note
that the table specifies the allowed bit combinations for
SZ1 - SZ0. Any other combinations generate
unpredictable results.
SZ1 - SZ0 are set equal to the SZ1 - SZ0 bits of the
DRAM/SRAM Options Register. SZ1 - SZ0 are
programmable to facilitate diagnostic software.
Note
For an MVME172 with 128 KB of SRAM, the software must
program SZ1-SZ0 = $1 (512 KB). Therefore, the SRAM
contents will repeat in the memory map.
ADR/SIZ
$FFF42024 (8 bits)
BIT
15
14
13
12
11
10
9
8
NAME
SEN
SZ1
SZ0
OPER
R
RESET
0 PL
Table 3-7. SRAM Size Control Bit Encoding
SZ1 - SZ0
Memory Size
$0
Reserved (do not use)
$1
512 KB (or 128 KB)
$2
1 MB
$3
2 MB