Motorola MVME2300 Series - Manual (Page 108)

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Raven PCI Bridge ASIC
2
SMAM PCI Signalled Master Abort Machine Check Enable.
When this bit is set, the SMA bit in the MERST register is
used to assert the MCHK output to the bus master which
initiated the transaction. When this bit is clear, MCHK is
not asserted.
RTAM PCI Master Received Target Abort Machine Check
Enable.When this bit is set, the RTA bit in the MERST
register is used to assert the MCHK output to the bus
master which initiated the transaction. When this bit is
clear, MCHK is not asserted.
MATOI MPC Address Bus Time-out Interrupt Enable.When
this bit is set, the MATO bit in the MERST register is used
to assert an interrupt through the MPIC interrupt
controller. When this bit is clear, no interrupt is asserted.
PERRI PCI Parity Error Interrupt Enable.When this bit is set,
the PERR bit in the MERST register is used to assert an
interrupt through the MPIC interrupt controller. When this
bit is clear, no interrupt is asserted.
SERRI PCI System Error Interrupt Enable.When this bit is
set, the PERR bit in the MERST register is used to assert
an interrupt through the MPIC interrupt controller. When
this bit is clear, no interrupt is asserted.
SMAI PCI Master Signalled Master Abort Interrupt
Enable.When this bit is set, the SMA bit in the MERST
register is used to assert an interrupt through the MPIC
interrupt controller. When this bit is clear, no interrupt is
asserted.
RTAI PCI Master Received Target Abort Interrupt
Enable.When this bit is set, the RTA bit in the MERST
register is used to assert an interrupt through the MPIC
interrupt controller. When this bit is clear, no interrupt is
asserted.