Motorola MVME2300 Series - Manual (Page 82)

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Raven PCI Bridge ASIC
2
MPC Bus Address Space
The Raven will map MPC address space into PCI Memory space using
four programmable map decoders. The most significant 16 bits of the PCI
address are compared with the address range of each map decoder; if the
address falls within the specified range, the access is passed on to the MPC
bus. An example of this appears in
Figure 2-4 .
Figure 2-4. PCI to MPC Address Decoding
The Raven ASIC imposes no limits on how large an address space a map
decoder can represent. There is a minimum of 64KB due to the resolution
of the address compare logic.
For each map, there is an associated set of attributes. These attributes are
used to enable read accesses, enable write accesses, enable write-posting,
and define the MPC bus transfer characteristics.
Each map decoder also includes a programmable 16-bit address offset. The
offset is added to the 16 most significant bits of the PCI address, and the
result is used as the MPC address. This offset allows devices to reside at
any MPC address, independent of the PCI address map. An example of this
appears in
Figure 2-5 .
PCI Bus Address 8 0 8 0 1 2 3 4
0 15 16 31
PSADDx Register 7 0 8 0 9 0 0 0
0 15 16 31
>= <= and Decode is