Motorola MVME2300 Series - Manual (Page 222)

3-60 Computer Group Literature Center Web Site
Falcon ECC Memory Controller Chip Set
3
Data Paths
Because of the Falcon “pair” architecture, data paths can be confusing.
Figure 3-10 attempts to show the placement of data that is written by a
PowerPC master to DRAM. Table 3-22 shows the same information in
tabular format.
Figure 3-10. PowerPC Data to DRAM Data Correspondence
1909 9609
Lower Falcon’s
DRAM
Upper Falcon’s
DRAM
ra12=1
PowerPC
Data
ra12=0
ra12=1 ra12=0
rd63
dl31
rd32
rd31
rd0
rd63
rd32
rd31
rd0
dl0
dh31
dh0
a[27:28]
=0
a[27:28]
=1
a[27:28]
=2
a[27:28]
=3