Motorola MVME2300 Series - Manual (Page 72)

2-2 Computer Group Literature Center Web Site
Raven PCI Bridge ASIC
2
Block Diagram
Figure 2-1 shows a functional block diagram of the Raven ASIC. The
Raven control logic is subdivided into the following functions:
❏ PCI slave
❏ PCI master
❏ MPC slave
❏ MPC master
Interrupt Controller MPIC compliant
Support for 16 external interrupt sources and two processors
Multiprocessor interrupt control allowing any interrupt source to be
directed to either processor
Multilevel cross-processor interrupt control for multiprocessor
synchronization
Four 31-bit tick timers
Processor
Coordination Two 64-bit general purpose registers for cross-processor messaging
Table 2-1. Features of the Raven ASIC (Continued)
Function Features