Vendor identification register, Processor init register – Motorola MVME2300 Series User Manual
Page 145
Raven Interrupt Controller
http://www.motorola.com/computer/literature
2-75
2
Vendor Identification Register
Two of the fields in the Vendor Identification register are not defined for
the RavenMPIC implementation, but are defined in the MPIC
specification. They are the vendor identification and device ID fields.
STP
Stepping. The stepping or silicon revision number is
initially 0.
Processor Init Register
P1
Processor 1. Writing a 1 to P1 will assert the Soft Reset
input of processor 1. Writing a 0 to it will negate the
SRESET signal.
P0
Processor 0. Writing a 1 to P0 will assert the Soft Reset
input of processor 0. Writing a 0 to it will negate the
SRESET signal.
Offset
$01080
Bit
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9 8 7 6 5 4 3 2 1 0
Name
VENDOR IDENTIFICATION
STP
Operation
R
R
R
R
Reset
$00
$02
$00
$00
Offset
$01090
Bit
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9 8 7 6 5 4 3 2 1 0
Name
PROCESSOR INIT
P1
P0
Operation
R
R
R
R
R/W
R/W
Reset
$00
$00
$00
$00
0
0