Motorola MVME2300 Series - Manual (Page 244)

4-20 Computer Group Literature Center Web Site
Universe (VMEbus to PCI) Chip
4
LSI0_CTL register: EN, VAS, LAS
LSI0_BS register: Bits [31:28]
LSI0_BD register: Bits [31:28]
All the other fields in the LSI0 registers are reset to 0, which explains why
the PGM and SUPER fields changed, the translation offset reset to 0, etc.