Motorola MVME2300 Series User Manual
Page 118
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2-48
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Raven PCI Bridge ASIC
2
All write operations to reserved registers will be treated as no-ops. That is,
the access will be completed normally on the bus and the data will be
discarded. Read accesses to reserved or unimplemented registers will be
completed normally and a data value of 0 returned.
The Raven PCI Configuration Register map appears in
. The
Raven PCI I/O Register map appears in
Table 2-8. Raven PCI Configuration Register Map
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9 8 7 6 5 4 3 2 1 0
<--- Bit
DEVID
VENID
$00
PSTAT
PCOMM
$04
CLASS
REVID
$08
$0C
IOBASE
$10
MEMBASE
$14
$18 - $7F
PSADD0
$80
PSOFF0
PSATT0
$84
PSADD1
$88
PSOFF1
PSATT1
$8C
PSADD2
$90
PSOFF2
PSATT2
$94
PSADD3
$98
PSOFF3
PSATT3
$9C
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