Motorola MVME2300 Series - Manual (Page 257)

Endian Issues
http://www.motorola.com/computer/literature 5-13
5
Processor/Memory Domain
The MPC603 and MPC604 processors can operate in both big-endian and
little-endian mode. However, they always treat the external
processor/memory bus as big-endian by performing address
rearrangement and reordering when running in little-endian mode.
The MPC registers inside the Raven, the registers inside the Falcon chip
set, the DRAM, the ROM/Flash, and the system registers always appear as
big-endian.
Role of the Raven ASIC
Since PCI is little-endian, the Raven PowerPC-to-PCI-Local-Bus bridge
controller chip performs byte swapping in both directions (from PCI to
memory and from the processor to PCI) to maintain address invariance
when it is programmed to operate in big-endian mode with the processor
and the memory subsystem.
In little-endian mode, it reverse-rearranges the address for PCI-bound
accesses and rearranges the address for memory-bound accesses (from
PCI). In this case, no byte swapping is done.
PCI Domain
The PCI bus is inherently little-endian and all devices connected directly
to PCI will operate in little-endian mode, regardless of the mode of
operation in the processor’s domain.
PCI-SCSI
The MVME2300 series boards do not implement SCSI.
PCI/Ethernet
Ethernet is byte-stream-oriented, with the byte having the lowest address
in memory being the first one transferred regardless of endian mode. Since
address invariance is maintained by the Raven in both little-endian and