Motorola MVME2300 Series - Manual (Page 189)

Programming Model
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3
Register Summary
Table 3-10 shows a summary of the CSR. Note that the table shows only
addresses for accesses to the upper Falcon. To get the addresses for
accesses to the lower Falcon, add 4 to the address shown. Since the only
way to write to the lower Falcon’s internal register set and test SRAM is to
duplicate what is written to the upper Falcon, only the addresses shown in
the table should be used for writes to them. Writes to the external register
set are not duplicated from upper to lower, so writes to them can be via the
upper or lower Falcon.
Detailed Register Bit Descriptions
The sections following Table 3-10 describe the registers and their bits in
detail. The possible operations for each bit in the register set are as follows:
R The bit is a read-only status bit.
R/W The bit is readable and writable.
R/C The bit is cleared by writing a 1 to itself.
C The bit is readable. Writing a 0 to the bit will clear it.
The possible states of the bits after local and power-up reset are as defined
below.
P The bit is affected by power-up reset.
L The bit is affected by local reset.
X The bit is not affected by reset.
V The effect of reset on the bit is variable.