Motorola MVME2300 Series - Manual (Page 37)

Programming Model
http://www.motorola.com/computer/literature 1-13
1
PCI Memory Maps
The PCI memory map is controlled by the Raven ASIC and the Universe
ASIC. The Raven ASIC and the Universe ASIC have flexible
programming Map Decoder registers to customize the system to fit many
different applications.
Default PCI Memory Map
After a reset, the Raven ASIC and the Universe ASIC turn all the PCI slave
map decoders off. Software must program the appropriate map decoders
for a specific environment.
PCI CHRP Memory Map
The following table shows a PCI memory map of the MVME2300 series
that is CHRP-compatible from the point of view of the PCI local bus.
Table 1-7. PCI CHRP Memory Map
PCI Address
Size Definition Notes
Start End
0000 0000 top_dram dram_size Onboard ECC DRAM 1
4000 0000 EFFF FFFF 3G - 256M VMEbus A32/D32 (Super/Program) 3
F000 0000 F7FF FFFF 128M VMEbus A32/D16 (Super/Program) 3
F800 0000 F8FE FFFF 16M - 64K VMEbus A24/D16 (Super/Program) 4
F8FF 0000 F8FF FFFF 64K VMEbus A16/D16 (Super/Program) 4
F900 0000 F9FE FFFF 16M - 64K VMEbus A24/D32 (Super/Data) 4
F9FF 0000 F9FF FFFF 64K VMEbus A16/D32 (Super/Data) 4
FA00 0000 FAFE FFFF 16M - 64K VMEbus A24/D16 (User/Program) 4
FAFF 0000 FAFF FFFF 64K VMEbus A16/D16 (User/Program) 4
FB00 0000 FBFE FFFF 16M - 64K VMEbus A24/D32 (User/Data) 4
FBFF 0000 FBFF FFFF 64K VMEbus A16/D32 (User/Data) 4