Motorola MVME2300 Series - Manual (Page 254)

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Programming Details
5
Error Notification and Handling
The Raven ASIC and Falcon chip set can detect certain hardware errors
and can be programmed to report these errors via the RavenMPIC
interrupts or Machine Check Interrupt. Note that the TEA
∗
signal is not
used at all by the MVME2300 series. The following table summarizes how
hardware errors are handled by the MVME2300 series boards:
Table 5-5. Error Notification and Handling
Cause Action
Single-bit ECC Store: Write corrected data to memory.
Load: Present corrected data to the MPC master.
Generate interrupt via RavenMPIC if so enabled.
Double-bit ECC Store: Terminate the bus cycle normally without writing to DRAM.
Load: Present un-corrected data to the MPC master.
Generate interrupt via RavenMPIC if so enabled.
Generate Machine Check Interrupt to the processor(s) if so enabled.
MPC Bus Time Out Store: Discard write data and terminate bus cycle normally.
Load: Present undefined data to the MPC master.
Generate interrupt via RavenMPIC if so enabled.
Generate Machine Check Interrupt to the processor(s) if so enabled.
PCI Target Abort Store: Discard write data and terminate bus cycle normally.
Load: Return all ones and terminate bus cycle normally.
Generate interrupt via RavenMPIC if so enabled.
Generate Machine Check Interrupt to the processor(s) if so enabled.
PCI Master Abort Store: Discard write data and terminate bus cycle normally
Load: Return all ones and terminate bus cycle normally
Generate interrupt via RavenMPIC if so enabled
Generate Machine Check Interrupt to the processor(s) if so enabled
PERR# Detected Generate interrupt via RavenMPIC if so enabled
Generate Machine Check Interrupt to the processor(s) if so enabled
SERR# Detected Generate interrupt via RavenMPIC if so enabled
Generate Machine Check Interrupt to the processor(s) if so enabled