Motorola MVME2300 Series - Manual (Page 133)

Raven Interrupt Controller
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passed directly to processor 0. If the pass-through mode is disabled, the
8259 interrupts are delivered using the priority and distribution
mechanisms of the RavenMPIC.
The RavenMPIC does not interact with the vector fetch from the 8259
interrupt controller.
Raven-Detected Errors
Raven-detected errors are grouped together and sent to the interrupt logic
as a single interrupt source. The interrupt delivery mode for this interrupt
is distributed. The Raven Error Vector Priority register should be
programmed for high true level sensitive activation.
For system implementations where the RavenMPIC controller is not used,
the Raven-Detected Error condition will be made available by a signal
which is external to the Raven ASIC. Presumably this signal would be
connected to an externally sourced interrupt input of a MPIC controller in
a different device. Since the MPIC specification defines external I/O
interrupts to operate in the distributed mode, the delivery mode of this
error interrupt should be consistent.
Timers
There is a divide-by-eight prescaler which is synchronized to the Raven
clock (MPC processor clock). The output of the prescaler enables the
decrement of the four timers. The timers may be used for system timing or
to generate periodic interrupts. Each timer has four registers which are
used for configuration and control. They are:
1. Current Count register
2. Base Count register
3. Vector Priority register
4. Destination register