Motorola MVME2300 Series User Manual

Page 202

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Falcon ECC Memory Controller Chip Set

3

Unlike most of the other registers, however, it is normal for this status to
differ between the two. This is due to the fact that each Falcon is connected
to its own set of DRAMs. The upper Falcon can log an error during a cycle
and the local Falcon not, or vice-versa. Or they can both log an error during
the same cycle and have the attributes of the errors differ.

Due to the above characteristics, software must monitor both the upper and
lower Falcon’s Error Logger and Error Address registers. This includes
checking the elog bit from the upper Falcon and from the lower Falcon.
When the upper Falcon logs an error, it updates its attribute bits (escb,
embt, esbt, ERROR_SYNDROME, eblk0, eblk1, and
ERROR_ADDRESS) to match the results of the read cycle for its portion
of the DRAM array. When the lower Falcon logs an error, it updates its
attribute bits to match the results of the read cycle for its portion of the
DRAM array.

While the logging of errors by one Falcon in a pair does not affect the
logging of errors by the other, writing to the Error Logger Register control
bits affects both Falcons. This is of particular interest as regards the elog
bit. Writing a 1 to the elog bit clears the elog bit for both the upper and
lower Falcons. Because of this, software needs to check the status of both
upper and lower Error Logger and Error Address registers before it clears
the elog bits. Otherwise, it could miss a logged error.

elog

When set, elog indicates that a single- or multiple-bit error
has been logged by its Falcon. If elog is set by a multiple-
bit error, then no more errors will be logged until software
clears it. If elog is set by a single-bit error, then no more
single-bit errors will be logged until software clears it,
however if elog is set by a single-bit error and a multiple-
bit error occurs, the multiple-bit error will be logged and
the single-bit error information overwritten. elog can only
be set by the logging of an error and cleared by the writing
of a 1 to itself or by power-up reset.

escb

escb indicates the entity that was accessing DRAM at the
last logging of a single- or multiple-bit error by its Falcon.
If escb is 1, it indicates that the scrubber was accessing

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