Motorola MVME2300 Series - Manual (Page 172)

3-10 Computer Group Literature Center Web Site
Falcon ECC Memory Controller Chip Set
3
ROM/Flash Speeds
The Falcon pair provides the interface for two blocks of ROM/Flash. Each
block can address up to 64MB of memory depending on the width
implemented for that block (16 bits or 64 bits). Bank A is 64 bits wide and
bank B is 16 bits wide. The access times for ROM/Flash are listed in
Table
3-5 and Table 3-6 .
Table 3-5. PowerPC 60 x Bus to ROM/Flash Access Timing — 64 Bits
(32 Bits per Falcon)
Table 3-6. PowerPC 60 x Bus to ROM/Flash Access Timing — 16 Bits (8 Bits
per Falcon)
Access Type
Clock Periods Required For:
Total
Clocks 1st
Beat
2nd
Beat
3rd
Beat
4th
Beat
4-Beat Read 20 16 16 16 68
4-Beat Write N/A N/A N/A N/A N/A
1-Beat Read 20 - - - 20
1-Beat Write 19 - - - 19
Access Type
Clock Periods Required For:
Total
Clocks 1st
Beat
2nd
Beat
3rd
Beat
4th
Beat
4-Beat Read 68 64 64 64 260
4-Beat Write N/A N/A N/A N/A N/A
1-Beat Read (2 bytes to 8 bytes) 68 - - - 68
1-Beat Read (1 byte) 20 - - - 20
1-Beat Write 19 - - - 19