Motorola MVME2300 Series - Manual (Page 125)

Raven Registers
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2
PCI Slave Attribute/ Offset (0,1,2 and 3) Registers
INV Invalidate Enable. If set, the MPC master will issue a
transfer type code which specifies the current transaction
should cause an invalidate for each MPC transaction
originated by the corresponding PCI slave. The transfer
type codes generated are shown in
Table 2-3 .
GBL Global Enable. If set, the MPC master will assert the
GBL
∗
pin for each MPC transaction originated by the
corresponding PCI slave.
RAEN Read Ahead Enable. If set, read-ahead is enabled for the
corresponding PCI slave.
WPEN Write-Post Enable. If set, write-posting is enabled for the
corresponding PCI slave.
WEN Write Enable. If set, the corresponding PCI slave is
enabled for write transactions.
REN Read Enable. If set, the corresponding PCI slave is
enabled for read transactions.
PSOFFx PCI Slave Offset. Contains a 16-bit offset that is added to
the upper 16 bits of the PCI address to determine the MPC
address used for transfers from PCI to the MPC bus. This
offset allows MPC resources to reside at addresses that
would not normally be visible from PCI.
Offset PSATT0/PSOFF0 - $84
PSATT1/PSOFF1 - $8C
PSATT2/PSOFF2 - $94
PSATT3/PSOFF3 - $9C
Bit 3
1 3
0 2
9 2
8 2
7 2
6 2
5 2
4 2
3 2
2 2
1 2
0 1
9 1
8 1
7 1
6 1
5 1
4 1
3 1
2 1
1 1
0 9 8 7 6 5 4 3 2 1 0
Name PSOFFx PSATTx
REN WEN WPE
N
RAEN GBL INV
Operation R/W R
R/
w R/
W R/
W R/
W R R R/
W R/
W
Reset $0000 $00
0 0 0 0 0 0 0 0