Motorola MVME2300 Series - Manual (Page 228)

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Universe (VMEbus to PCI) Chip
4
Figure 4-1. Architectural Diagram for the Universe
VMEbus Interface
This section examines the Universe ASIC’s VMEbus interface function,
from the standpoint of the Universe as VMEbus slave as well as VMEbus
master.
Universe as VMEbus Slave
The Universe VME Slave channel accepts all of the addressing and data
transfer modes documented in the VME64 specification (except A64 and
those intended to support 3U applications, that is, A40 and MD32).
Incoming write transactions from the VMEbus may be treated as either
coupled or posted, depending upon the programming of the VMEbus slave
image. (Refer to VME Slave Images in the Universe User Manual.) With
posted write transactions, data is written to a Posted Write Receive FIFO
(RXFIFO), and the VMEbus master receives data acknowledgment from
VME
Slave
VME
Master
VME
Interrupts
posted writes FIFO
coupled read logic
DMA bidirectional FIFO
Interrupt Handler
Interrupter
Register Channel
VMEbus Slave Channel
posted writes FIFO
prefetch read FIFO
coupled read
PCI Bus Slave Channel
Interrupt Channel
PCI
Master
PCI
Slave
PCI
Interrupts
VMEbus
PCI
BUS
PCI Bus
Interface
VMEbus
Interface
DMA Channel
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