Altera DisplayPort MegaCore Function - Manual (Page 125)

Source MSA Registers
The MSA registers are allocated at addresses:
• 0×0020 through 0×002e for Stream 0
• 0×0040 through 0×004e for Stream 1
• 0×0060 through 0×006e for Stream 2
• 0×0080 through 0×008e for Stream 3
Note: Only registers for Stream 0 are listed in the following sections.
DPTX0_MSA_MVID
Address: 0×0020
Direction: RO
Reset: 0×00000000
Table 9-4: DPTX0_MSA_MVID Bits
Bit Bit Name Function
31:24 Unused
23:0
MVID
Main stream attribute MVID
DPTX0_MSA_NVID
Address: 0×0021
Direction: RO
Reset: 0×00000000
Table 9-5: DPTX0_MSA_NVID Bits
Bit Bit Name Function
31:24 Unused
23:0
NVID
Main stream attribute NVID
DPTX0_MSA_HTOTAL
Address: 0×0022
Direction: RO
Reset: 0×00000000
9-4 Source MSA Registers
UG-01131
2015.05.04
Altera Corporation DisplayPort Source Register Map and DPCD Locations
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