Altera DisplayPort MegaCore Function - Manual (Page 140)

Table 9-36: DPTX_MST_VCPTAB6 Bits
Bit Bit Name Function
31:28
VCPSLOT55 VC payload ID or slot 55
27:24
VCPSLOT54 VC payload ID or slot 54
23:20
VCPSLOT53 VC payload ID or slot 53
19:16
VCPSLOT52 VC payload ID or slot 52
15:12
VCPSLOT51 VC payload ID or slot 51
11:8
VCPSLOT50 VC payload ID or slot 50
7:4
VCPSLOT49 VC payload ID or slot 49
3:0
VCPSLOT48 VC payload ID or slot 48
DPTX_MST_VCPTAB7
VC Payload ID Table
Address: 0×00a9
Direction: RW
Reset: 0×00000000
Table 9-37: DPTX_MST_VCPTAB7 Bits
Bit Bit Name Function
31:28
VCPSLOT63 VC payload ID or slot 63
27:24
VCPSLOT62 VC payload ID or slot 62
23:20
VCPSLOT61 VC payload ID or slot 61
19:16
VCPSLOT60 VC payload ID or slot 60
15:12
VCPSLOT59 VC payload ID or slot 59
11:8
VCPSLOT58 VC payload ID or slot 58
7:4
VCPSLOT57 VC payload ID or slot 57
3:0
VCPSLOT56 VC payload ID or slot 56
UG-01131
2015.05.04
DPTX_MST_VCPTAB7 9-19
DisplayPort Source Register Map and DPCD Locations Altera Corporation
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