Source mst registers, Source mst registers -14 – Altera DisplayPort MegaCore Function User Manual

Page 135

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Bit

Bit Name

Function

15:0

CRC_G

Input video CRC for the green

component

Computed video CRC blue component,

DPTX0_CRC_B

, bits.

Address: 0×0032
Direction: RO
Reset: 0×00000000

Table 9-28: DPTX0_CRC_B Bits

Bit

Bit Name

Function

31:16

Unused

15:0

CRC_B

Input video CRC for the blue

component

Source MST Registers

MST controller control.
Address: 0×00a0
Direction: RW

Table 9-29: DPTX_MST_CONTROL1 Bits

Bit

Bit Name

Function

31

VCPTAB_UPD_FORCE

This flag always reads back at 0.
1 = Force VC payload ID table update

30

VCPTAB_UPD_REQ

This flag always reads back at 0.
1 = Request for VC payload ID table update

29:20

Unused

19:16

VCP_ID3

VC payload ID for Stream 3

15:12

VCP_ID2

VC payload ID for Stream 2

11:8

VCP_ID1

VC payload ID for Stream 1

7:4

VCP_ID0

VC payload ID for Stream 0

3:1

Unused

9-14

Source MST Registers

UG-01131

2015.05.04

Altera Corporation

DisplayPort Source Register Map and DPCD Locations

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