Altera DisplayPort MegaCore Function - Manual (Page 154)

Table 10-3: DPRX_RX_CONTROL Bits (Non-Controller Mode)
Bit Bit Name Function
31:24 Unused
23:16 RX_LINK_RATE Main link rate expressed as multiples of 270 Mbps:
• 0×06 = 1.62 Gbps
• 0×0a = 2.7 Gbps
• 0×14 = 5.4 Gbps
15:5 Unused
4:0 LANE_COUNT Lane count:
• 00001 = 1
• 00010 = 2
• 00100 = 4
DPRX_RX_STATUS
GXB_BUSY
connects to the
rx_reconfig_busy
input port.
Address: 0×0001
Direction: CRO
Reset: 0×00000000
Table 10-4: DPRX_RX_STATUS Bits
Bit Bit Name Function
31:18 Unused
17 GXB_BUSY 0 = Transceiver not busy
1 = Transceiver busy
16 SYNC_LOSS This flag can be reset by writing it to 1:
0 = Symbol lock on all lanes in use
1 = Symbol lock lost on one or more of the used lanes
15:8 Unused
7 SYM_LOCK3 0 = Symbol unlocked (lane 3)
1 = Symbol locked (lane 3)
UG-01131
2015.05.04
DPRX_RX_STATUS 10-3
DisplayPort Sink Register Map and DPCD Locations Altera Corporation
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