Controller Interface....................................................................................................................... 5-13
AUX Interface.................................................................................................................................5-13
Debugging Interface...................................................................................................................... 5-14
Video Interface...............................................................................................................................5-16
RX Transceiver Interface.............................................................................................................. 5-19
Transceiver Reconfiguration Interface....................................................................................... 5-19
Secondary Stream Interface..........................................................................................................5-19
Audio Interface...............................................................................................................................5-21
MSA Interface.................................................................................................................................5-22
Sink Clock Tree..........................................................................................................................................5-24
DisplayPort IP Core Hardware Demonstration.................................................6-1
Clock Recovery Core................................................................................................................................... 6-4
Clock Recovery Core Parameters.................................................................................................. 6-5
Clock Recovery Interface................................................................................................................ 6-6
Transceiver and Clocking.........................................................................................................................6-11
Required Hardware................................................................................................................................... 6-14
Design Walkthrough................................................................................................................................. 6-22
Set Up the Hardware..................................................................................................................... 6-23
Copy the Design Files to Your Working Directory.................................................................. 6-23
Build the FPGA Design.................................................................................................................6-25
Load, and Run the Software......................................................................................................... 6-25
View the Results.............................................................................................................................6-26
DisplayPort IP Core Simulation Example..........................................................7-1
Design Walkthrough................................................................................................................................... 7-3
Copy the Simulation Files to Your Working Directory..............................................................7-3
Generate the IP Simulation Files and Scripts, and Compile and Simulate..............................7-6
View the Results............................................................................................................................... 7-8
DisplayPort API Reference................................................................................. 8-1
Using the Library......................................................................................................................................... 8-1
btc_dprx_syslib API Reference.................................................................................................................. 8-3
btc_dprx_aux_get_request......................................................................................................................... 8-3
btc_dprx_aux_handler................................................................................................................................ 8-4
btc_dprx_aux_post_reply........................................................................................................................... 8-5
btc_dprx_baseaddr...................................................................................................................................... 8-6
btc_dprx_dpcd_gpu_access........................................................................................................................8-6
btc_dprx_edid_set........................................................................................................................................8-7
btc_dprx_hpd_get........................................................................................................................................8-8
btc_dprx_hpd_pulse....................................................................................................................................8-8
btc_dprx_hpd_set........................................................................................................................................ 8-9
btc_dprx_syslib_add_rx..............................................................................................................................8-9
btc_dprx_syslib_info................................................................................................................................. 8-10
btc_dprx_syslib_init.................................................................................................................................. 8-11
btc_dprx_syslib_monitor..........................................................................................................................8-11
TOC-3
Altera Corporation
