Altera DisplayPort MegaCore Function - Manual (Page 165)

Sink Audio Registers
The audio registers are allocated at addresses:
• 0×0030 through 0×003f for Stream 0
• 0×0050 through 0×005f for Stream 1
• 0×0070 through 0×007f for Stream 2
• 0×0090 through 0×009f for Stream 3
Note: Only registers for Stream 0 are listed in the following sections.
DPRX0_AUD_MAUD
Received audio Maud register,
DPRX0_AUD_MAUD
.
Address: 0×0030
Direction: RO
Reset: 0×00000000
Table 10-25: DPRX0_AUD_MAUD Bits
Bit Bit Name Function
31:24 Unused
23:0 MAUD Received audio Maud
DPRX0_AUD_NAUD
Received audio Naud register,
DPRX0_AUD_NAUD
.
Address: 0×0031
Direction: RO
Reset: 0×00000000
Table 10-26: DPRX0_AUD_NAUD Bits
Bit Bit Name Function
31:24 Unused
23:0 NAUD Received audio Naud
DPRX0_AUD_AIF0
Received audio InfoFrame register,
DPRX0_AUD_AIF0
.
Address: 0×0032
Direction: RO
10-14 Sink Audio Registers
UG-01131
2015.05.04
Altera Corporation DisplayPort Sink Register Map and DPCD Locations
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